Dell VA-40FC Service Manual Page 13

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Fabric OS v6.4.1 Release Notes v1.0 Page 13 of 62
If there are multiple node EGs (encryption groups) in a fabric, please complete firmwaredownload on one node
at a time before downloading on another node.
The Brocade 8000 does not support non-disruptive hot code loads (HCL). Upgrading the Brocade 8000 to FOS
v6.4 will be disruptive to the IO through the switch.
A code load of DCX or DCX-4s with one or more FCOE10-24 blades will disrupt the traffic going through those
FCOE10-24 blades.
Disable the ports
Disable the ports Disable the ports
Disable the ports in DCX Logical Switches that use 10 bit addressing mode
use 10 bit addressing modeuse 10 bit addressing mode
use 10 bit addressing mode that have 8 bit areas in the range
that have 8 bit areas in the range that have 8 bit areas in the range
that have 8 bit areas in the range
0x70
0x700x70
0x70-
--
-0x8F before upgrading to FOS v6.4
0x8F before upgrading to FOS v6.40x8F before upgrading to FOS v6.4
0x8F before upgrading to FOS v6.4.x from 6.3.x.
.x from 6.3.x..x from 6.3.x.
.x from 6.3.x.. Otherwise firmware upgrade will fail with an error
message. This step is necessary even if users do not plan to use FC8-64 blades after performing firmware
upgrade to FOS v6.4. However, if areas 0x70-0x8F are not in use this step is not necessary. Please use
portAddress CLI to find out the areas in use within a Logical Switch.
If Bottleneck detection feature is currently enabled
Bottleneck detection feature is currently enabledBottleneck detection feature is currently enabled
Bottleneck detection feature is currently enabled on the switch running FOS v6.3.x, you must disable it
disable itdisable it
disable it
before upgrading to FOS v6.4
before upgrading to FOS v6.4before upgrading to FOS v6.4
before upgrading to FOS v6.4; otherwise, frame drops may occur due to increased Hot Code Load (HCL) time.
7800 platform and FX8
7800 platform and FX87800 platform and FX8
7800 platform and FX8-
--
-24 blade must be powe
24 blade must be powe24 blade must be powe
24 blade must be power cycled after upgrading
r cycled after upgradingr cycled after upgrading
r cycled after upgrading
from FOS v6.3 to
from FOS v6.3 tofrom FOS v6.3 to
from FOS v6.3 to
FOS v6.4
FOS v6.4FOS v6.4
FOS v6.4. This is
necessary to load the new FPGA image that enables IPv6 capability for FCIP links to 7800 and FX8-24 blade.
This step is mandatory even if IPv6 will not be used on the FCIP ports. Not performing this step will result in
unpredictable behaviors on the FCIP links. Please note that in the case of FX8-24, only the FX8-24 blade needs
to be power cycled and not the entire DCX/DCX-4S chassis.
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